Performance evaluation of 22nm and 14nm TG-FinFET using parametric analysis
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Date
2020-11
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G.B. Pant University of Agriculture and Technology, Pantnagar - 263145 (Uttarakhand)
Abstract
Relentless scaling of planar MOSFETs over the past four decades has delivered ever increasing transistor density and performance to the Integrated Circuits (ICs). The continuing trend of scaling of planar MOSFET in nanometer regime has become challenging as it brought several detrimental effects such as increased leakage current and short channel effects (SCEs).
Hence, to face these formidable challenges in nanometer regime FinFET has emerged as the best successors. In this proposed work, a study of various process parameter variations on the operation of Multigate transistor has been done. For this, Tri-gate FinFET (TG-FinFET) structure of 22nm and 14nm device has been designed by using TCAD tool. The parameters such as fin
height, fin width, channel doping, oxide thickness and underlap length has been varied for both low-k dielectric material and high-k dielectric material and the device performance has been observed. The simulation results with high-k dielectric and low-k dielectric were observed. It showed that with the increase in doping concentration and decrease in fin height and width the performance of device improved and the short channel effects reduced. Replacing low-k dielectric with high-k dielectric material results in improvement in device performance.