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20191
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Subject: Electronic and Communication Engineering × Author: Singh, Urwashi × Type: Thesis × Thesis Type: M.Tech ×
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    ThesisItemOpen Access
    A robust 11T SRAM cell with improved SNM in 22nm technology
    (G.B. Pant University of Agriculture and Technology, Pantnagar - 263145 (Uttarakhand), 2019-08) Singh, Urwashi; Sharma, K.K.
    Static Random Access Memory (SRAM) is fundamental memory block used as caches in computers, processors and battery operated devices. In this proposed work, simulation study of different SRAM cell is carried out using Complementary Metal Oxide Semiconductor (CMOS) and Fin shaped Field Effect Transistor (FinFET) 22nm technology at the supply voltage of 0.8V with HSPICE tool. As the technology scaled in nanometer range, the Short Channel Effects (SCEs) causes degradation in the performance of the CMOS devices. This SCE is minimized by using FinFET devices at lower technology node. The performance metrics such as Hold SNM, Read SNM, Write SNM, access time, Static and Dynamic power is evaluated to check the behaviour of existing SRAM cells in 22nm node. A new 11T SRAM is also proposed and its performance metrics are calculated in both CMOS and FinFET 22nm technology. The simulation results of proposed 11T SRAM Cell is compared with existing SRAM cells. The proposed11T SRAM Cell achieves hold and read SNM as 285mV and write SNM as 336 mV in CMOS technology whereas the hold, read and write SNM in FinFET technology is 360mV, 360mV and 375mV, respectively. The proposed SRAM cell has shown enhanced SNM due to isolation of read and write path. The second important parameter, static power is 3.72nW in CMOS technology and 0.49nW in FinFET technology. Because of reduction in static power and improved SNM the proposed 11T SRAM cell can be used in low power high stability applications such as smart phones, LCD displays and CPU processor.