Tomar, AbhishekVarshney, Swati2018-08-282018-08-282017-07http://krishikosh.egranth.ac.in/handle/1/5810069700Radio Frequency signal transmission via wireless technologies is becoming a major method of communication in modern age. But the signal obtained after reception is often corrupted with noise. So, to suppress noise the received signal need to be processed. LNA plays an important role in determining the receiver performance because it is used to amplify the very small signal coming from antenna while adding as little noise and distortion as possible. The main focus of this thesis is to design a Low Noise Amplifier having flat gain for the frequency range of 2-6 GHz. A novel architecture of current reuse LNA with resistive feedback and inductive source degeneration is proposed. Current reuse structure is used to reduce the power consumption and resistive feedback along with inductive source degeneration topology is used for input matching. The input and output matching is better for maximum signal transfer. 0.18 µm TSMC CMOS technology is used for designing the proposed LNA and cadence virtuoso software is used to simulate the schematic of LNA. Simulation shows that the proposed LNA has achieved flat gain, better input & output matching, good isolation and better stability. Amplifier has 15.4 dB gain with 0.3 dB variation, input return loss less than 12.4 dB, output return loss less than -17.4 dB, reverse isolation less than -48.33 dB and noise figure less than 5.2 dB. It exhibit 1-dB compression point -21.86 dBm and third order input intercept point-9.93 dBm at 4 GHz frequency respectively. The circuit draws 21.95 mW from 1.8 V supply voltage.ennullThesis